The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2023

Filed:

Dec. 22, 2020
Applicant:

Renesas Electronics America Inc., Milpitas, CA (US);

Inventors:

Han Chong, Milpitas, CA (US);

Sungkeun Lim, Milpitas, CA (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H02J 7/06 (2006.01); H02M 3/155 (2006.01); H02J 50/10 (2016.01);
U.S. Cl.
CPC ...
H02J 7/06 (2013.01); H02J 7/0029 (2013.01); H02J 50/10 (2016.02); H02M 3/155 (2013.01);
Abstract

Example implementations include a method of reducing current overshoot in a power regulator device, by detecting a change in an input current of an inductive charger device in response to a change in load on the inductive charger device, modifying an operating state of the inductive charger device in accordance with a first input current limit parameter based on a total input current limit parameter and a current division parameter, in response to the detecting the change in the input current, operating the inductive charger device in accordance with the first input current limit during a current limit period subsequent to the detecting the change in the input current, modifying the operating state of the inductive charger device in accordance with a second input current limit parameter based on the total input current limit parameter and the current division parameter, subsequent to the current limit period, and operating the inductive charger device in accordance with the second input current limit subsequent to the current limit period.


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