The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2023

Filed:

Aug. 02, 2021
Applicant:

Pure Storage, Inc., Mountain View, CA (US);

Inventors:

John D. Davis, San Francisco, CA (US);

John Hayes, Mountain View, CA (US);

Hari Kannan, Sunnyvale, CA (US);

Nenad Miladinovic, Campbell, CA (US);

Zhangxi Tan, Mountain View, CA (US);

Assignee:

PURE STORAGE, INC., Mountain View, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/20 (2006.01); G06F 11/16 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2069 (2013.01); G06F 3/064 (2013.01); G06F 3/067 (2013.01); G06F 3/0619 (2013.01); G06F 3/0685 (2013.01); G06F 3/0689 (2013.01); G06F 11/1068 (2013.01); G06F 11/1072 (2013.01); G06F 11/1076 (2013.01); G06F 11/1612 (2013.01); G06F 2201/805 (2013.01); G06F 2201/82 (2013.01);
Abstract

A plurality of storage nodes within a single chassis is provided. The plurality of storage nodes is configured to communicate together as a storage cluster. The plurality of storage nodes has a non-volatile solid-state storage for user data storage. The plurality of storage nodes is configured to distribute the user data and metadata associated with the user data throughout the plurality of storage nodes, with erasure coding of the user data. The plurality of storage nodes is configured to recover from failure of two of the plurality of storage nodes by applying the erasure coding to the user data from a remainder of the plurality of storage nodes. The plurality of storage nodes is configured to detect an error and engage in an error recovery via one of a processor of one of the plurality of storage nodes, a processor of the non-volatile solid state storage, or the flash memory.


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