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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11616120 B1

PDFFull Text
Date of Patent:
Mar. 28, 2023

Filed:

Mar. 09, 2021

Semiconductor substrate, method of manufacturing semiconductor device, and method of manufacturing semiconductor substrate

Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Fuyuma Ito, Yokkaichi, JP;

Tatsuhiko Koide, Kuwana, JP;

Hiroki Nakajima, Mie, JP;

Naomi Yanai, Kuwana, JP;

Tomohiko Sugita, Yokkaichi, JP;

Hakuba Kitagawa, Yokkaichi, JP;

Takaumi Morita, Kuwana, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:

Oblon, McClelland, Maier & Neustadt, L.L.P.

Primary Examiner:

Khaja Ahmad

Int. Cl.
CPC ...
H01L 29/06 (2006.01); H01L 21/02 (2006.01); H01L 27/06 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 29/06 (2013.01); H01L 21/02019 (2013.01); H01L 21/76802 (2013.01); H01L 27/0688 (2013.01);
Abstract

A semiconductor substrate includes a surface having a groove. The groove includes an inner bottom surface and an inner wall surface. The inner wall surface has a depression. The depression has a depth from a direction along a surface of the inner wall surface to a width direction of the groove. The substrate being exposed to the inner wall surface.

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Ito, Fuyuma. (2023). Semiconductor substrate, method of manufacturing semiconductor device, and method of manufacturing semiconductor substrate (U.S. Patent No. 11616120). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11616120

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