The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2023

Filed:

Jan. 23, 2020
Applicant:

Nvidia Corporation, Santa Clara, CA (US);

Inventors:

Joseph Greco, San Jose, CA (US);

Joseph Minacapelli, Sunnyvale, CA (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 49/02 (2006.01);
U.S. Cl.
CPC ...
H01L 23/5384 (2013.01); H01L 23/5385 (2013.01); H01L 24/14 (2013.01); H01L 25/0655 (2013.01); H01L 28/10 (2013.01);
Abstract

In accordance with the disclosure, an inductor may be formed over a semiconductor substrate of one or both dies in a face-to-face die arrangement while reducing the parasitic capacitance between the inductor and the adjacent die. In disclosed embodiments, a semiconductor device may include a void (e.g., an air gap) between the inductor and the adjacent die to reduce the parasitic capacitance between the inductor and the adjacent die. The void may be formed in the die that includes the inductor and/or the adjacent die. In some respects, the void may be etched in interface layers (e.g., comprising bump pads and dielectric material) between the semiconductor dies, and may extend along the length of the inductor.


Find Patent Forward Citations

Loading…