The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2023

Filed:

Oct. 15, 2020
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventors:

Catherine Graves, Milpitas, CA (US);

Can Li, Palo Alto, CA (US);

Kivanc Ozonat, Palo Alto, CA (US);

John Paul Strachan, Milpitas, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 15/04 (2006.01); G11C 11/00 (2006.01); G06F 9/38 (2018.01); G11C 11/06 (2006.01); G11C 11/412 (2006.01);
U.S. Cl.
CPC ...
G11C 11/005 (2013.01); G06F 9/3877 (2013.01); G11C 11/06057 (2013.01); G11C 11/4125 (2013.01);
Abstract

Examples described herein relate to a decision tree computation system in which a hardware accelerator for a decision tree is implemented in the form of an analog Content Addressable Memory (a-CAM) array. The hardware accelerator accesses a decision tree. The decision tree comprises of multiple paths and each path of the multiple paths includes a set of nodes. Each node of the decision tree is associated with a feature variable of multiple feature variables of the decision tree. The hardware accelerator combines multiple nodes among the set of nodes with a same feature variable into a combined single node. Wildcard values are replaced for feature variables not being evaluated in each path. Each combined single node associated with each feature variable is mapped to a corresponding column in the a-CAM array and the multiple paths of the decision tree to rows of the a-CAM array.


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