The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2023

Filed:

Jun. 01, 2018
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Matthew James Horsnell, Cambridge, GB;

Grigorios Magklis, Cambridge, GB;

Richard Roy Grisenthwaite, Cambridge, GB;

Assignee:

Arm Limited, Cambridge, GB;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 12/1027 (2016.01); G06F 9/46 (2006.01); G06F 9/54 (2006.01); G06F 12/0873 (2016.01);
U.S. Cl.
CPC ...
G06F 12/1027 (2013.01); G06F 9/467 (2013.01); G06F 9/544 (2013.01); G06F 12/0873 (2013.01); G06F 2212/151 (2013.01); G06F 2212/683 (2013.01);
Abstract

A data processing system () including one or more transaction buffers () storing address translation data executes translation buffer invalidation instructions TLBI within respective address translation contexts VMID, ASID, X. Translation buffer invalidation signals generated as a consequence of execution of the translation buffer invalidation instructions are broadcast to respective translation buffers and include signals which specify the address translation context of the translation buffer invalidation instruction that was executed. This address translation context specified within the translation buffer invalidation signals is used to gate whether or not those translation buffer invalidation signals when received by translation buffers which are potential targets for the invalidation are or are not flushed. The address translation context data provided within the translation buffer invalidation signals may also be used to control whether or not local memory transactions for a local transactional memory access are or are not aborted upon receipt of the translation buffer invalidation signals.


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