The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2023

Filed:

May. 07, 2020
Applicant:

Meta Platforms, Inc., Menlo Park, CA (US);

Inventors:

Thomas Mark Ulrich, Mountain View, CA (US);

Abdulkadir Utku Diril, Menlo Park, CA (US);

Zhao Wang, Newark, CA (US);

Assignee:

Meta Platforms, Inc., Menlo Park, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 7/575 (2006.01); G06F 7/483 (2006.01); G06F 7/523 (2006.01); G06F 17/16 (2006.01); G06N 3/02 (2006.01);
U.S. Cl.
CPC ...
G06F 7/575 (2013.01); G06F 7/483 (2013.01); G06F 7/523 (2013.01); G06F 17/16 (2013.01); G06N 3/02 (2013.01);
Abstract

A device (e.g., integrated circuit chip) includes a first operand register, a second operand register, a multiplication unit, and a hardware logic component. The first operand register is configured to store a first operand value. The second operand register is configured to store a second operand value. The multiplication unit is configured to at least multiply the first operand value with the second operand value. The hardware logic component is configured to detect whether a zero value is provided and in response to a detection that the zero value is being provided: cause an update of at least the first operand register to be disabled, and cause a result of a multiplication of the first operand value with the second operand value to be a zero-value result.


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