The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2023
Filed:
Sep. 09, 2021
Samsung Electronics Co., Ltd., Suwon-si, KR;
Nageswara Rao Kunchapu, Bengaluru, IN;
Tamal Das, Bengaluru, IN;
Akshay Karkal Kamath, Bengaluru, IN;
Mohit Arora, Bengaluru, IN;
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Abstract
A multi-lane transmitting apparatus includes lanes, and each lane includes a serializer circuit to convert parallel bits to serial bits. A clock signal generator generates a first clock signal having phases. A deserializer circuit converts serial bits to parallel bits. A Built-In Self-Test (BIST) circuit includes a signal generator circuit for generating a signal having bits in a defined pattern. A comparator circuit compares a pattern of bits of an output signal with the defined pattern. A BIST lane circuit monitors a status of the lanes. A BIST central circuit receives the status and determines if a number of lanes having an unmatched status is less than a threshold value. A phase extrapolator circuit adjusts a phase of the first clock signal when the number of the lanes is less than the threshold value.