The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2023

Filed:

Jun. 04, 2021
Applicant:

Institute of Microelectronics, Chinese Academy of Sciences, Beijing, CN;

Inventors:

Kunyu Wang, Beijing, CN;

Li Zhou, Beijing, CN;

Jie Chen, Beijing, CN;

Minghui Chen, Beijing, CN;

Ming Chen, Beijing, CN;

Wenjing Xu, Beijing, CN;

Chengbin Zhang, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 3/00 (2006.01);
U.S. Cl.
CPC ...
H03M 3/344 (2013.01); H03M 3/424 (2013.01); H03M 3/464 (2013.01);
Abstract

A quantizer for a sigma-delta modulator, a sigma-delta modulator, and a method of shaping noise are provided. The quantizer includes: an integrator configured to generate, in a Ksampling period, a quantization error signal for a Kperiod according to an internal signal, a quantization error signal for a (K−1)period, a filtered quantization error signal for the (K−1)period and a filtered quantization error signal for a (K−2)period; an integrating capacitor configured to store the quantization error signal for the Kperiod, to weight the internal signal in a (K+1)sampling period; a passive low-pass filter configured to acquire the quantization error signal for the Kperiod in a Kdischarge period, and feed back the filtered quantization error signal to the integrator in a (K+1)sampling period and a (K+2)sampling period; and a comparator configured to quantize the quantization error signal for the Kperiod.


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