The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2023

Filed:

Oct. 18, 2021
Applicant:

Mediatek Inc., Hsin-Chu, TW;

Inventors:

Shou-En Liu, Hsinchu, TW;

Wen-Sung Chiang, Hsinchu, TW;

Ming-Han Hsieh, Hsinchu, TW;

Keng-Jui Chang, Hsinchu, TW;

Lin-Chien Chen, Hsinchu, TW;

Assignee:

MEDIATEK INC., Hsin-Chu, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03M 13/25 (2006.01); G06F 1/08 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); G06F 1/08 (2013.01); H03M 13/25 (2013.01);
Abstract

A duty margin monitoring circuit, coupled to a functional circuit which generates a first output signal in response to a target signal, includes a modulation circuit, a replica circuit and an error detection circuit. The modulation circuit is arranged to receive the target signal and modulate the target signal to generate a modulated target signal. The replica circuit is arranged to receive the modulated target signal and generate a second output signal in response to the modulated target signal. The error detection circuit is coupled to the functional circuit and the replica circuit to receive the first output signal and the second output signal and arranged to generate an error detection result according to the first output signal and the second output signal.


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