The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2023

Filed:

May. 13, 2021
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Sergio Kolor, Haifa, IL;

Oren Bar, Herzliya, IL;

Ilya Granovsky, Kiryat Tivon, IL;

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/17 (2006.01); G06F 15/78 (2006.01); G06F 9/54 (2006.01); G06F 9/445 (2018.01); G06F 9/4401 (2018.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 15/17 (2013.01); G06F 9/4406 (2013.01); G06F 9/44505 (2013.01); G06F 9/546 (2013.01); G06F 13/4031 (2013.01); G06F 15/7807 (2013.01);
Abstract

In an embodiment, a system on a chip (SOC) comprises a semiconductor die on which circuitry is formed, wherein the circuitry comprises a memory controller circuit and a plurality of networks formed from a plurality of individual network component circuits. The memory controller includes a PIO message control circuit that is configured to receive PIO messages addressed to individual network component circuits and determine whether to send the PIO messages to the individual network component circuits based on determine whether previous PIO messages are pending for the individual network component circuits. The PIO message control circuit is configured to delay a first PIO message at the PIO message control circuit in response to determining that previous PIO message is pending for the addressee of the first PIO message.


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