The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2023

Filed:

Dec. 28, 2017
Applicant:

Ador Diagnostics S.r.l., Rome, IT;

Inventors:

Dalibor Hodko, Poway, CA (US);

Howard R. Reese, Poway, CA (US);

Vladimir Hurgin, Ashdod, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/167 (2019.01); C40B 30/10 (2006.01); B01L 3/00 (2006.01); C12N 15/10 (2006.01); B01L 7/00 (2006.01); C12M 1/00 (2006.01); C40B 40/00 (2006.01);
U.S. Cl.
CPC ...
G02F 1/167 (2013.01); B01L 3/502753 (2013.01); C12N 15/1013 (2013.01); C40B 30/10 (2013.01); B01L 3/50273 (2013.01); B01L 3/502707 (2013.01); B01L 7/525 (2013.01); B01L 2200/0652 (2013.01); B01L 2300/043 (2013.01); B01L 2300/044 (2013.01); B01L 2300/0645 (2013.01); B01L 2300/0672 (2013.01); B01L 2300/0816 (2013.01); B01L 2300/0861 (2013.01); B01L 2300/0864 (2013.01); B01L 2400/0478 (2013.01); C12M 1/00 (2013.01); C40B 40/00 (2013.01);
Abstract

The present invention discloses an electrophoretic chip comprising: (a) a non-conductive substrate designed to support elements of said electrophoretic chip; (b) an electrode structure for conducting current through said electrophoretic chip, printed on said non-conductive substrate and comprising a counter electrode and at least one working electrode, each electrode comprising a conductive low-resistance ink layer printed on the non-conductive substrate, and a carbon ink layer printed on top of and fully or partially covering said conductive low-resistance ink layer; (c) a dielectric ink insulator layer placed on top of, and covering, said electrode structure, said dielectric ink insulator layer having at least one opening above the counter electrode and at least one opening above said at least one working electrode, thereby forming at least one addressable location; and (d) a molecule capturing matrix spotted on and covering said at least one addressable location, thereby creating at least one microgel region.


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