Image sensors with reduced peak power

Abstract

An image sensor may include a pixel array having pixels arranged in rows and columns, column readout circuitry, and control circuitry. Column readout circuitry may include corresponding readout circuits each coupled to a corresponding column path for a respective column of pixels. The readout circuits may each include signal processing circuits such as correlated double sampling circuitry and analog-to-digital converter circuitry. To reduce peak-to-average power ratio, during the signal processing operations for each pixel row, the control circuitry may control the signal processing circuits to perform time-domain multiplexing across the pixel columns to activate the signal processing circuits at varied times within the row time. If desired, the pattern of time-domain multiplexing may be varied across the signal processing operations for different pixel rows and/or for different image frames.