The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2023

Filed:

Mar. 25, 2021
Applicant:

Murata Manufacturing Co., Ltd., Kyoto, JP;

Inventor:

Isao Takenaka, Kyoto, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/26 (2006.01); H04B 1/04 (2006.01); H03F 3/195 (2006.01); H04B 1/525 (2015.01); H03F 3/24 (2006.01); H01L 23/538 (2006.01); H01L 25/16 (2023.01); H03F 3/21 (2006.01); H04B 1/10 (2006.01); H04B 1/16 (2006.01);
U.S. Cl.
CPC ...
H03F 1/26 (2013.01); H01L 23/5383 (2013.01); H01L 23/5386 (2013.01); H01L 25/16 (2013.01); H03F 3/195 (2013.01); H03F 3/211 (2013.01); H03F 3/245 (2013.01); H04B 1/0458 (2013.01); H04B 1/0475 (2013.01); H04B 1/1018 (2013.01); H04B 1/1607 (2013.01); H04B 1/525 (2013.01); H03F 2200/102 (2013.01); H03F 2200/129 (2013.01); H03F 2200/144 (2013.01); H03F 2200/165 (2013.01); H03F 2200/171 (2013.01); H03F 2200/294 (2013.01); H03F 2200/451 (2013.01); H04B 2001/0408 (2013.01);
Abstract

A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.


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