The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 07, 2023

Filed:

Jun. 09, 2020
Applicants:

Verisilicon Microelectronics (Shanghai) Co., Ltd., Shanghai, CN;

Verisilicon Holdings Co., Ltd., George Town, KY;

Inventors:

Mankit Lo, San Jose, CA (US);

Meng Yue, Shanghai, CN;

Jin Zhang, Shanghai, CN;

Assignees:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 7/544 (2006.01); G06N 3/04 (2006.01);
U.S. Cl.
CPC ...
G06F 7/5443 (2013.01); G06N 3/04 (2013.01);
Abstract

A device for performing multiply/accumulate operations processes values in first and second buffers and having a first width using a computational pipeline with a second width, such as half the first width. A sequencer processes combinations of portions (high-high, low-low, high-low, low-high) of the values in the first and second buffers using a multiply/accumulate circuit and adds the accumulated result of each combination of portions to a group accumulator. Adding to the group accumulator may be preceded by left shifting the accumulated result (the first width for the high-high combination and the second width for the low-high and high-low combination).


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