The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2023

Filed:

Dec. 29, 2017
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Patrick Jones, Soest, DE;

Christoph Koch, Salzkotten, DE;

Michael Sielaff, Erwitte, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H05K 7/02 (2006.01); H05K 7/14 (2006.01); H05K 7/20 (2006.01);
U.S. Cl.
CPC ...
H05K 7/02 (2013.01); H05K 7/1432 (2013.01); H05K 7/209 (2013.01); H05K 7/20409 (2013.01); H01L 2924/0002 (2013.01); Y10T 29/49208 (2015.01);
Abstract

A method of producing a semiconductor module arrangement includes providing a first subassembly having a number Nof first adjustment openings, a second subassembly having a number Nof second adjustment openings and a third subassembly having a plurality of adjustment pins which are fixedly connected to one another, the first subassembly, the second subassembly and the third subassembly being independent of one another and not connected to one another. The first subassembly, the second subassembly and the third subassembly are arranged relative to one another in such a way that each of the adjustment pins engages into one of the first adjustment openings and/or into one of the second adjustment openings.


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