The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2023

Filed:

May. 11, 2021
Applicants:

Mitsubishi Electric Research Laboratories, Inc., Cambridge, MA (US);

Mitsubishi Electric Corporation, Tokyo, JP;

Inventors:

Jianlin Guo, Cambridge, MA (US);

Philip Orlik, Cambridge, MA (US);

Yukimasa Nagai, Tokyo, JP;

Takenori Sumi, Tokyo, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H04W 40/16 (2009.01); H04W 40/18 (2009.01); H04W 40/28 (2009.01); H04L 45/48 (2022.01); H04L 45/02 (2022.01); H04L 45/12 (2022.01);
U.S. Cl.
CPC ...
H04W 40/16 (2013.01); H04L 45/02 (2013.01); H04L 45/08 (2013.01); H04L 45/123 (2013.01); H04L 45/124 (2013.01); H04L 45/48 (2013.01); H04W 40/18 (2013.01); H04W 40/28 (2013.01);
Abstract

A node device for forming a multi-hop network is provided. The node device is configured to avoid interference from coexisting interfering networks and includes a transceiver configured to receive and transmit data with respect to a Destination Oriented Directed Acyclic Graph (DODAG) Information Object message (DIO message), a memory configured to store computer executable programs including an interfered-node count (IC), single-rate link count (SLC), multi-rate link count (MLC), hop count (HP), path communication latency (PCL) and an interference efficient and multi-rate supported routing program CoM-RPL, and a processor configured to perform steps of the computer executable programs. The steps include determining if the received DIO message indicates a new DODAG or an existing DODAG. In this case, if a determined result in the determining indicates the new DODAG and no single-rate link and no interfered node on a path of multi-hop network, the node device joins DODAG network and the processor selects a sender of the DIO message as a default parent, computes a rank for itself, updates DIO message with its rank, IC, SLC, TRM, HP, PCL and transmits scheduled DIO messages based on transmission rate mode.


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