The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2023

Filed:

Mar. 03, 2022
Applicant:

Ciena Corporation, Hanover, MD (US);

Inventors:

YoungJun Park, Ottawa, CA;

Sadok Aouini, Gatineau, CA;

Assignee:

Ciena Corporation, Hanover, MD (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/089 (2006.01); H03L 7/081 (2006.01); H03L 7/091 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0891 (2013.01); H03L 7/081 (2013.01); H03L 7/091 (2013.01);
Abstract

Described herein is a phase frequency detector (PFD) with a wide operational range. The PFD includes a first flip-flop to receive a reference clock and generate a first output signal based on differences between the reference clock and a feedback clock, a second flip-flop to receive the feedback clock and generate a second output signal based on differences between the reference the feedback clocks, a reset processing path connected to the first flip-flop and second flip-flop, the reset processing path having a reset delay to control a pulse width of a reset signal associated with the first flip-flop and second flip-flop, and an output processing path connected to the first flip-flop and second flip-flop, the output processing path having an output delay to control a pulse width of the first output signal and the second output signal, where the reset processing path and the output processing path are delay independent.


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