The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2023

Filed:

Apr. 19, 2021
Applicant:

Netapp, Inc., Sunnyvale, CA (US);

Inventors:

Brian McKean, Boulder, CO (US);

Sai Susarla, Bangalore, IN;

Ariel Hoffman, Boulder, CO (US);

Assignee:

NETAPP, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/0893 (2016.01); G06F 3/06 (2006.01); G06F 11/34 (2006.01); G06F 30/33 (2020.01);
U.S. Cl.
CPC ...
G06F 12/0893 (2013.01); G06F 3/0689 (2013.01); G06F 11/3409 (2013.01); G06F 11/3447 (2013.01); G06F 11/3457 (2013.01); G06F 30/33 (2020.01); G06F 2201/865 (2013.01); G06F 2212/1021 (2013.01); G06F 2212/601 (2013.01);
Abstract

A method, a computing device, and a non-transitory machine-readable medium for modifying cache settings in the array cache are provided. Cache settings are set in an array cache, such that the array cache caches data in an input/output (I/O) stream based on the cache settings. Multiple cache simulators simulate the caching the data from the I/O stream in the array cache using different cache settings in parallel with the array cache. The cache settings in the array cache are replaced with the cache settings from one of the cache simulators based on the determination that the cache simulators increase effectiveness of caching data in the array cache.


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