The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2023
Filed:
Oct. 13, 2021
Kabushiki Kaisha Toshiba, Tokyo, JP;
Toshiba Electronic Devices & Storage Corporation, Tokyo, JP;
Haruya Iwata, Kanagawa, JP;
Tatsuya Tokue, Kanagawa, JP;
Sohei Kushida, Tokyo, JP;
Takayuki Mori, Chiba, JP;
Satoshi Kamiya, Kanagawa, JP;
KABUSHIKI KAISHA TOSHIBA, Tokyo, JP;
TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION, Tokyo, JP;
Abstract
A semiconductor integrated circuit includes a clock controller generating a clock; and a plurality of blocks that operate by using the clock. The clock controller performs statistical processing for the plurality of blocks, controls a frequency of the clock to a first frequency, changes the frequency of the clock from the first frequency to a second frequency, generates the clock of the second frequency after a time predicted by the statistical processing as a time for which the second frequency is to be continued elapses from a timing when the frequency of the clock is changed, and supplies the generated clock to the blocks. The clock controller generates a third frequency clock obtained by decimating down the second frequency from the first frequency according to a time for which the first and second frequencies are to be continued after the frequency of the clock is changed from the second frequency to the first frequency, and supplies the generated clock to the blocks.