The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2023

Filed:

Nov. 27, 2020
Applicant:

Commissariat À I'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Inventor:

Dominique Bergogne, Grenoble, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H03K 17/10 (2006.01); H02M 1/00 (2006.01); H02M 1/38 (2007.01); H02M 7/797 (2006.01);
U.S. Cl.
CPC ...
H02M 1/0054 (2021.05); H02M 1/0058 (2021.05); H02M 1/08 (2013.01); H02M 1/38 (2013.01); H02M 7/797 (2013.01); H03K 17/102 (2013.01); H03K 2217/0009 (2013.01);
Abstract

The present description concerns a method of controlling a bidirectional switch (), including: first () and () field-effect transistors electrically in series between first () and second () terminals of the bidirectional switch; third () and fourth () field-effect transistors electrically in series between said first and second terminals of the bidirectional switch, a first connection node () in series with the first and second transistors being common with a second connection node () in series with the third and fourth transistors, including steps of: receiving a voltage (V) between the terminals of the bidirectional switch; detecting, from the received voltage, a first sign of said voltage; at least while the first sign is being detected, coupling the first terminal to said first node (), potentials of control terminals of the first, second, third, and fourth transistors being referenced to the potential (REF) of the first and second nodes having common sources of the first, second, third, and fourth transistors connected thereto.


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