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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 11587952 B1

PDFFull Text
Date of Patent:
Feb. 21, 2023

Filed:

Jan. 12, 2021

Thin film transistor including crystallized semiconductor, display device including the same, manufacturing method of the same, and method for crystallizing semiconductor

Applicant:

Adrc. Co. KR, Seoul, KR;

Inventors:

Youngbin Do, Seoul, KR;

Chae Yeon Hwang, Seoul, KR;

Assignee:

ADRC. CO. KR, Seoul, KR;

Attorney:

Lex IP Meister, PLLC

Primary Examiner:

Jack S Chen

Int. Cl.
CPC ...
H01L 27/12 (2006.01); H01L 29/786 (2006.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); G02F 1/1343 (2006.01); H01L 27/15 (2006.01); H01L 27/32 (2006.01); G02F 1/1368 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1222 (2013.01); H01L 21/02422 (2013.01); H01L 21/02488 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/02683 (2013.01); H01L 27/1218 (2013.01); H01L 27/1266 (2013.01); H01L 27/1274 (2013.01); H01L 29/66757 (2013.01); H01L 29/78675 (2013.01); G02F 1/1368 (2013.01); G02F 1/134309 (2013.01); G02F 2202/104 (2013.01); H01L 27/156 (2013.01); H01L 27/3262 (2013.01);
Abstract

A thin film transistor according to an exemplary embodiment includes: a substrate; a semiconductor layer disposed on the substrate and including a channel region, and an input region and an output region disposed on both sides of the channel region and doped with an impurity; a buffer layer disposed between the substrate and the semiconductor layer; a control electrode overlapping the semiconductor layer; a gate insulation layer disposed between the semiconductor layer and the control electrode; and an input electrode connected to the input region and an output electrode connected to the output region, wherein the semiconductor layer includes polysilicon and is crystallized by a blue laser scan.

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