The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 2023

Filed:

Jul. 26, 2021
Applicant:

Dell Products L.p., Round Rock, TX (US);

Inventors:

Rajeswari Ayyaswamy, Round Rock, TX (US);

Senthil Kumar Parangusam, Round Rock, TX (US);

James Peter Giannoules, Round Rock, TX (US);

Sheshadri Pathpalya Raghavendra Rao, Bengaluru, IN;

Aniruddha Suresh Herekar, Belgaum, IN;

Assignee:

Dell Products L.P., Round Rock, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 3/0629 (2013.01); G06F 3/061 (2013.01); G06F 3/0679 (2013.01); G06F 9/4406 (2013.01);
Abstract

In one or more embodiments, one or more systems, one or more methods, and/or one or more processes may boot an operating system; after booting the operating system, determine that a solid state drive has been hot added to a Peripheral Component Interconnect Express (PCIe) port; suppress discovery of the solid state drive by the operating system; determine a policy associated with the solid state drive; determine that a current configuration associated with the solid state drive does not match a configuration associated with the policy associated with the solid state drive; determine that the configuration associated with the policy can be applied to the solid state drive; apply the configuration associated with the policy to the solid state drive without utilizing the operating system; and inform the operating system that the solid state drive has been communicatively coupled to at least one processor via a PCIe root complex.


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