The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2023
Filed:
Aug. 21, 2020
Beijing Boe Display Technology Co., Ltd., Beijing, CN;
Boe Technology Group Co., Ltd., Beijing, CN;
Yang Wang, Beijing, CN;
Bo Feng, Beijing, CN;
Xiaoxiao Chen, Beijing, CN;
Wenjun Xiao, Beijing, CN;
Hao Xu, Beijing, CN;
Zhiying Bao, Beijing, CN;
Tianxin Zhao, Beijing, CN;
Wenkai Mu, Beijing, CN;
Bingqing Yang, Beijing, CN;
Yi Liu, Beijing, CN;
Shijun Wang, Beijing, CN;
BEIJING BOE DISPLAY TECHNOLOGY CO., LTD., Beijing, CN;
BOE TECHNOLOGY GROUP CO., LTD., Beijing, CN;
Abstract
A pixel architecture includes sub-pixels, gate lines extending in first direction and data lines. Two gate lines are provided between every two adjacent rows of sub-pixels. Each data line includes first extension portions extending in first direction and second extension portions extending in second direction intersecting the first direction. The gate lines and the data lines define pixel regions each being provided with two sub-pixels arranged in the first direction therein. Every two adjacent first extension portions and a second extension portion connected between the two first extension portions constitute a projection portion accommodating at least one pixel region. All sub-pixels in each projection portion are coupled to the same data line to receive data voltage signals with the same voltage polarity. Sub-pixels in two adjacent projection portions in the second direction are coupled to two adjacent data lines to receive data voltage signals with opposite voltage polarities.