Digital pre-distortion compensation of digital-to-analog converter non-linearity

Abstract

Systems, apparatuses, and methods for performing digital pre-distortion compensation of digital-to-analog converter non-linearity are described. A correction circuit receives a digital input word and couples a portion of the most significant bits (MSB's) of the digital input word to a correction lookup table (LUT). A correction value is retrieved from a correction LUT entry that matches the MSB's of the digital input word. Next, the correction value is added to the original digital input word in the digital domain. Then, the sum generated by adding the correction value to the original digital input word is optionally clipped if the sum exceeds the DAC core's input range. Next, the DAC core converts the sum into an analog value that is representative of the digital input word. The above approach helps to reduce non-linearities introduced by the DAC core in an energy-efficient manner by performing a correction in the digital domain.