The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Feb. 27, 2019
Applicant:

Telefonaktiebolaget Lm Ericsson (Publ), Stockholm, SE;

Inventors:

Henrik Fredriksson, Lund, SE;

Henrik Sjöland, Lund, SE;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/12 (2006.01); H03M 1/04 (2006.01); H03M 3/00 (2006.01); H03M 1/10 (2006.01); H03M 1/36 (2006.01); H03M 1/06 (2006.01);
U.S. Cl.
CPC ...
H03M 1/04 (2013.01); H03M 1/06 (2013.01); H03M 1/1023 (2013.01); H03M 1/1245 (2013.01); H03M 1/361 (2013.01); H03M 3/30 (2013.01);
Abstract

An ADC circuit () is disclosed. It comprises a global input configured to receive an input voltage (V) and a plurality of converter circuits (-). Each converter circuit () comprises a comparator circuit () having a first input connected to the global input, a second input, and an output configured to output a one-bit output signal of the comparator circuit (). Furthermore, each converter circuit () comprises a one-bit current-output DAC () having an input directly controlled from the output of the comparator circuit () and an output connected to the second input of the comparator circuit (). The second inputs of all comparator circuits are interconnected. The ADC circuit () further comprises a digital output circuit () configured to generate an output signal z[n] of the ADC circuit () in response to the one-bit output signals of the comparator circuits ().


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