The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 14, 2023

Filed:

Oct. 08, 2021
Applicant:

Nxp B.v., Eindhoven, NL;

Inventors:

Sanjay Kumar Wadhwa, Noida, IN;

Saurabh Goyal, Sonipat, IN;

Divya Tripathi, Noida, IN;

Assignee:

NXP B.V., Eindhoven, NL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/00 (2006.01); H03K 19/0175 (2006.01); H03K 19/0185 (2006.01); H03F 3/45 (2006.01); H03K 3/356 (2006.01); H03K 17/10 (2006.01); H03K 5/156 (2006.01);
U.S. Cl.
CPC ...
H03K 3/356113 (2013.01); H03K 5/1565 (2013.01); H03K 17/102 (2013.01); H03K 19/018521 (2013.01);
Abstract

A level shifter includes a control circuit and a bias circuit. The control circuit receives a bias voltage, a first signal associated with a first voltage domain, and supply voltages associated with a second voltage domain, and outputs a second signal that is associated with the second voltage domain. The bias circuit generates the bias voltage that is indicative of the duty cycle of the second signal, and provides the bias voltage to the control circuit to control the duty cycle of the second signal. The duty cycle of the second signal is controlled such that a difference between a duty cycle of the first signal and an inverse of the duty cycle of the second signal is less than a tolerance limit.


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