The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 14, 2023
Filed:
May. 19, 2022
Apple Inc., Cupertino, CA (US);
Rungrot Kitsomboonloha, San Jose, CA (US);
Chin-Wei Lin, San Jose, CA (US);
Shinya Ono, Santa Clara, CA (US);
Gihoon Choo, San Jose, CA (US);
Hao-Lin Chiu, Los Gatos, CA (US);
Kyung Wook Kim, Saratoga, CA (US);
Pei-En Chang, San Jose, CA (US);
Szu-Hsien Lee, Los Gatos, CA (US);
Zino Lee, San Diego, CA (US);
Apple Inc., Cupertino, CA (US);
Abstract
A display may include an array of pixels that receive control signals from a chain of gate drivers. Each gate driver may include a logic sub-circuit and an output buffer sub-circuit. The output buffer sub-circuit may include depletion mode semiconducting oxide transistors with high mobility. The logic sub-circuit may include semiconducting oxide transistors, some of which can be depletion mode transistors and some of which can be enhancement mode transistors with lower mobility. The logic sub-circuit may include at least a carry circuit, a voltage setting circuit, an inverting circuit, a discharge circuit.