The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Apr. 28, 2021
Applicant:

Stmicroelectronics (Grenoble 2) Sas, Grenoble, FR;

Inventors:

David Chesneau, Grenoble, FR;

Francois Amiard, Proveysieux, FR;

Helene Esch, Seyssinet Pariset, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/08 (2006.01); H02M 3/157 (2006.01); H02M 1/00 (2006.01);
U.S. Cl.
CPC ...
H02M 1/08 (2013.01); H02M 3/157 (2013.01); H02M 1/0045 (2021.05);
Abstract

A method for increasing performance of a voltage-buck switched-mode voltage regulator includes generating a first pulse-width modulation signal based on a clock signal, decreasing a frequency of the clock signal to form a modified clock signal, passing the modified clock signal to a digital modulation circuit as a regulated clock signal; and generating a second pulse-width modulation signal based on the regulated clock signal using the digital modulation circuit. The first pulse-width modulation signal includes a period Tand an off duration Dcorresponding to a first duty cycle. The off duration Dis an intrinsic pulse-width modulation signal generation latency. The second pulse-width modulation signal includes a period Tand the off duration D. The decreased frequency of the modified clock signal causes Tto be greater than Tsuch that a second duty cycle of the second pulse-width modulation signal is increased relative to the first duty cycle.


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