The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Feb. 19, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Deokhan Bae, Suwon-si, KR;

Juhun Park, Seoul, KR;

Myungyoon Um, Seoul, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 29/417 (2006.01); H01L 21/8238 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7843 (2013.01); H01L 27/0886 (2013.01); H01L 29/41791 (2013.01); H01L 21/823814 (2013.01);
Abstract

An integrated circuit device includes a substrate including first and second fin-type active areas, a gate structure on the first and second fin-type active areas, first and second source/drain regions on the first and second fin-type active areas, respectively, a first source/drain contact on the first source/drain region and comprising first and second portions, a second source/drain contact on the second source/drain region and comprising first and second portions, the second portion having an upper surface at a lower level than an upper surface of the first portion, a first stressor layer on the upper surface of the second portion of the first source/drain contact, and a second stressor layer on the upper surface of the second portion of the second source/drain contact, the second stressor layer including a material different from a material included in the first stressor layer.


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