The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Jul. 20, 2021
Applicant:

Nanya Technology Corporation, New Taipei, TW;

Inventor:

Jar-Ming Ho, Taipei, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/108 (2006.01); H01L 23/52 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 27/10888 (2013.01); H01L 23/5226 (2013.01); H01L 27/10885 (2013.01); H01L 27/10814 (2013.01);
Abstract

The present application discloses a method for fabricating a semiconductor device. The method includes: providing a substrate including a plurality of first regions and second regions; forming a plurality of bit line contacts over the first regions of the substrate; forming a plurality of bit lines respectively over the plurality of bit line contacts; forming a plurality of capacitor contacts respectively over the second regions of the substrate; forming a plurality of capacitor plugs respectively over the plurality of capacitor contacts; forming a plurality of first spacers respectively over a plurality of protruding portions of the plurality of capacitor plugs, wherein a width of the first spacer is larger than a width of the capacitor plug; and forming a plurality of capacitor structures over the plurality of first spacers; wherein at least one of the plurality of bit lines is an undulating stripe extending between two adjacent capacitor contacts.


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