The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Jan. 29, 2021
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Suvadip Banerjee, Horamavu, IN;

John Paul Tellkamp, Rockwall, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 21/00 (2006.01); H01L 21/44 (2006.01); H01R 9/00 (2006.01); H05K 7/00 (2006.01); B23K 31/02 (2006.01); H01L 23/00 (2006.01); H01L 21/48 (2006.01); H01L 23/528 (2006.01); H01L 23/488 (2006.01);
U.S. Cl.
CPC ...
H01L 24/14 (2013.01); H01L 21/4853 (2013.01); H01L 23/488 (2013.01); H01L 23/528 (2013.01); H01L 24/05 (2013.01); H01L 24/06 (2013.01); H01L 24/17 (2013.01); H01L 24/28 (2013.01); H01L 24/81 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/81 (2013.01);
Abstract

An electronic device includes one or more multinode pads having two or more conductive segments spaced from one another on a semiconductor die. A conductive stud bump is selectively formed on portions of the first and second conductive segments to program circuitry of the semiconductor die or to couple a supply circuit to a load circuit. The multinode pad can be coupled to a programming circuit in the semiconductor die to allow programming a programmable circuit of the semiconductor die during packaging. The multinode pad has respective conductive segments coupled to the supply circuit and the load circuit to allow current consumption or other measurements during wafer probe testing in which the first and second conductive segments are separately probed prior to stud bump formation.


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