The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Jul. 30, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jae Ho Ahn, Seoul, KR;

Ji Won Kim, Seoul, KR;

Sung-Min Hwang, Hwaseong-si, KR;

Joon-Sung Lim, Seongnam-si, KR;

Suk Kang Sung, Seongnam-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/535 (2006.01); H01L 23/00 (2006.01); H01L 25/18 (2006.01); H01L 21/768 (2006.01); H01L 25/00 (2006.01);
U.S. Cl.
CPC ...
H01L 24/08 (2013.01); H01L 21/76805 (2013.01); H01L 21/76895 (2013.01); H01L 23/535 (2013.01); H01L 24/80 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/80895 (2013.01); H01L 2224/80896 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01);
Abstract

A semiconductor memory device includes a first substrate including opposite first and second surfaces, a mold structure including gate electrodes stacked on the first surface of the first substrate, a channel structure through the mold structure, a first contact via penetrating the first substrate, a second substrate including opposite third and fourth surfaces, a circuit element on the third surface of the second substrate, a first through-via through the mold structure connecting the first contact via and the circuit element, the first through-via including a first conductive pattern, and a first spacer separating the first conductive pattern from the mold structure, and a second through-via through the mold structure and spaced apart from the first through-via, the second through-via including a second conductive pattern, and a second spacer separating the second conductive pattern from the first substrate and the mold structure.


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