The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 07, 2023
Filed:
Dec. 02, 2020
Applicant:
Kioxia Corporation, Tokyo, JP;
Inventors:
Keisuke Nakatsuka, Kobe Hyogo, JP;
Tomoya Sanuki, Yokkaichi Mie, JP;
Takashi Maeda, Kamakura Kanagawa, JP;
Go Shikata, Moriya Ibaraki, JP;
Hideaki Aochi, Yokkaichi Mie, JP;
Assignee:
Kioxia Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 7/08 (2006.01); H01L 27/11573 (2017.01); G11C 16/26 (2006.01); H01L 27/11529 (2017.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
G11C 7/106 (2013.01); G11C 7/08 (2013.01); G11C 7/18 (2013.01); G11C 16/26 (2013.01); H01L 27/11529 (2013.01); H01L 27/11573 (2013.01);
Abstract
A data latch circuit includes a first n-channel transistor and a first p-channel transistor. A gate of the first n-channel transistor and a gate of the first p-channel transistor are a common gate.
Nakatsuka, Keisuke. (2023). Data latch circuit and semiconductor memory device (U.S. Patent No. 11574663). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11574663
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile