The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

May. 27, 2021
Applicant:

Nuvoton Technology Corporation, Hsin-chu, TW;

Inventors:

Dan Morav, Herzliya, IL;

Ziv Hershman, Givat Shmuel, IL;

Oren Tanami, Ra'anana, IL;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 21/72 (2013.01); G06F 21/79 (2013.01); G06F 21/64 (2013.01); G06F 21/33 (2013.01); G06F 21/60 (2013.01);
U.S. Cl.
CPC ...
G06F 21/72 (2013.01); G06F 21/33 (2013.01); G06F 21/602 (2013.01); G06F 21/64 (2013.01); G06F 21/79 (2013.01); G06F 2221/0751 (2013.01);
Abstract

A method for provisioning an electronic device includes providing a semiconductor wafer on which multiple integrated circuit (IC) chips have been fabricated. Each chip includes a secure memory and programmable logic, which is configured to store at least two keys in the secure memory and to compute digital signatures over data using the at least two keys. A respective first key is provisioned into the secure memory of each of the chips via electrical probes applied to contact pads on the semiconductor wafer. After dicing of the wafer, a respective second key is provisioned into the secure memory of each of the chips via contact pins of the chips. A respective provisioning report is received from each of the chips with a digital signature computed by the logic using both of the respective first and second keys. The provisioning is verified based on the digital signature.


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