The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 2023

Filed:

Feb. 03, 2021
Applicant:

Shenzhen Chipuller Chip Technology Co., Ltd, Shenzhen, CN;

Inventor:

Mathew Salazar, Mountain View, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 1/3287 (2019.01); G06F 1/3234 (2019.01); G06F 1/26 (2006.01); H01L 23/50 (2006.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/266 (2013.01); G06F 1/325 (2013.01); H01L 23/50 (2013.01);
Abstract

Described herein are mechanisms and methods for blocking the propagation of signals to Integrated Circuit (IC) components that have been power gated, rather than simply suffering from leakage through signals that might not be parked in a low state. In some embodiments, switches that block the flow of current in such signals may enable turning off power to any IC component and not just to circuits on an IC component that make sole use of protocols that are friendly to power gating. This may advantageously increase power savings, by permitting more portions of a system in an idle state to be power gated, or by reducing or eliminating leakage in signals on boundaries of blocks being power gated, or both.


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