The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Mar. 01, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Aroma Bhat, Bengaluru, IN;

Arani Roy, Bengaluru, IN;

Mitesh Goyal, Bengaluru, IN;

Abhishek Ghosh, Bengaluru, IN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/3562 (2006.01); H03K 3/037 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0372 (2013.01); H03K 3/35625 (2013.01);
Abstract

A True Single-Phase Clock (TSPC) NAND-based reset flip-flop includes a reset functionality to perform a reset operation. The flip-flop with the reset functionality includes a master section and a slave section. The reset functionality is achieved using two transistors in the master section. The master section and the slave section operate using the TSPC. The master section and the slave section may include a plurality of NAND circuits and a NAND and NOR circuit for performing the reset operation. The master section outputs a plurality of internal signals on receiving a data input, a scan enable signal, a scan input signal, a reset control signal, and a clock signal. The slave section generates an output on receiving the plurality of internal signals received from the master section.


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