The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Jun. 03, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Min-hee Uh, Gwacheon-si, KR;

Sung-min Kang, Anyang-si, KR;

Jun-gu Kang, Hwaseong-si, KR;

Seung-hee Go, Seongnam-si, KR;

Young-mok Kim, Yongin-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 23/495 (2006.01); H01L 21/768 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 25/00 (2006.01); G09G 3/20 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); G09G 3/20 (2013.01); H01L 21/76852 (2013.01); H01L 21/76898 (2013.01); H01L 23/481 (2013.01); H01L 24/08 (2013.01); H01L 24/14 (2013.01); H01L 24/80 (2013.01); H01L 25/50 (2013.01); G09G 2310/0264 (2013.01); H01L 2224/08145 (2013.01); H01L 2224/145 (2013.01); H01L 2224/14051 (2013.01); H01L 2224/14517 (2013.01); H01L 2224/80896 (2013.01); H01L 2225/06524 (2013.01); H01L 2225/06544 (2013.01); H01L 2924/01079 (2013.01); H01L 2924/1426 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1434 (2013.01);
Abstract

An integrated circuit (IC) chip includes a via contact plug extending inside a through hole passing through a substrate and a device layer, a via contact liner surrounding the via contact plug, a connection pad liner extending along a bottom surface of the substrate, a dummy bump structure integrally connected to the via contact plug, and a bump structure connected to the connection pad liner. A method of manufacturing an IC chip includes forming an under bump metallurgy (UBM) layer inside and outside the through hole and forming a first connection metal layer, a second connection metal layer, and a third connection metal layer. The first connection metal layer covers the UBM layer inside the through hole, the second connection metal layer is integrally connected to the first connection metal layer, and the third connection metal layer covers the UBM layer on the connection pad liner.


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