The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Nov. 30, 2020
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Neil Whyte, Edinburgh, GB;

Andy Brewster, Edinburgh, GB;

Jens Puchert, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/30 (2006.01); G06F 11/07 (2006.01); G06F 11/16 (2006.01); G06F 13/24 (2006.01); G06F 13/42 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3027 (2013.01); G06F 11/0772 (2013.01); G06F 11/1687 (2013.01); G06F 13/24 (2013.01); G06F 13/4291 (2013.01);
Abstract

A device, comprising: a main module; a plurality of secondary modules; and a data bus configured to enable data transmission between the main module and the plurality of secondary modules over a data line of the data bus; wherein each of the plurality of secondary modules is configured with a unique secondary address used by the main module to communicate with the respective secondary module over the data line, wherein the main module is operable to configure a first two or more of the plurality of secondary modules with a first common secondary address for simultaneous data transmission from the main module to the first two or more of the plurality of secondary modules over the data line.


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