The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Jun. 23, 2021
Applicant:

Infineon Technologies Llc, San Jose, CA (US);

Inventors:

Sergey Ostrikov, Fremont, CA (US);

Florian Schreiner, Grasbrunn, DE;

Assignee:

INFINEON TECHNOLOGIES LLC, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/22 (2006.01); G06F 9/4401 (2018.01); G06F 21/57 (2013.01); G06F 11/14 (2006.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/2284 (2013.01); G06F 9/4403 (2013.01); G06F 11/0727 (2013.01); G06F 11/0757 (2013.01); G06F 11/1417 (2013.01); G06F 21/572 (2013.01); G06F 2221/033 (2013.01);
Abstract

A storage device can include at least one nonvolatile (NV) memory array that includes a first section having a first physical address range, and a second section having a second physical address range. A nonvolatile fault indication can be set to at least a fault state or a no-fault state. A memory watchdog circuit configured to set the fault indication to the fault state in response to an expiration of a predetermined watchdog period, the watchdog period being reset in response to a defer indication. An address mapping circuit can be configured to, in response to the fault indication having the no fault state, mapping input addresses to the first physical addresses range, and in response to the fault indication having the fault state, mapping the same input addresses to the second physical address range. Corresponding methods and systems are also disclosed.


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