The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 31, 2023

Filed:

Jun. 11, 2020
Applicant:

Arm Limited, Cambridge, GB;

Inventors:

Mouli Rajaram Chollangi, Fremont, CA (US);

Sriram Thyagarajan, Austin, TX (US);

Hongwei Zhu, San Jose, CA (US);

Yew Keong Chong, Austin, TX (US);

Pratik Ghanshambhai Satasia, Cedar Park, TX (US);

Assignee:

Arm Limited, Cambridge, GB;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 8/30 (2018.01); G06F 8/38 (2018.01); G06F 8/71 (2018.01); G06F 16/901 (2019.01); G11C 7/00 (2006.01); G06F 12/00 (2006.01); G06F 8/41 (2018.01);
U.S. Cl.
CPC ...
G06F 8/37 (2013.01); G06F 8/38 (2013.01); G06F 8/71 (2013.01); G06F 16/901 (2019.01); G11C 7/00 (2013.01); G06F 12/00 (2013.01);
Abstract

Various implementations described herein are directed to a system and methods for memory compiling. For instance, a method may include selecting source corners from a memory compiler configuration and generating a standardized set of memory instances for the selected source corners. Also, the method may include deriving a reduced set of memory instances based on the standardized set of memory instances and building a memory compiler database for a compiler space based on the standardized set of memory instances and the reduced set of memory instances.


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