The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2023

Filed:

Feb. 01, 2019
Applicants:

International Business Machines Corporation, Armonk, NY (US);

Globalfoundries Inc.;

Inventors:

Oleg Gluschenkov, Tannersville, NY (US);

Zuoguang Liu, Schenectady, NY (US);

Shogo Mochizuki, Clifton Park, NY (US);

Hiroaki Niimi, Cohoes, NY (US);

Tenko Yamashita, Schenectady, NY (US);

Chun-Chen Yeh, Clifton Park, NY (US);

Assignees:
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/285 (2006.01); H01L 29/08 (2006.01); H01L 29/24 (2006.01); H01L 29/267 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 21/768 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28518 (2013.01); H01L 21/28525 (2013.01); H01L 21/76814 (2013.01); H01L 21/76897 (2013.01); H01L 29/0847 (2013.01); H01L 29/24 (2013.01); H01L 29/267 (2013.01); H01L 29/66636 (2013.01); H01L 29/66795 (2013.01); H01L 29/7848 (2013.01); H01L 29/7851 (2013.01); H01L 21/76843 (2013.01); H01L 21/76855 (2013.01);
Abstract

Techniques for forming a metastable phosphorous P-doped silicon Si source drain contacts are provided. In one aspect, a method for forming n-type source and drain contacts includes the steps of: forming a transistor on a substrate; depositing a dielectric over the transistor; forming contact trenches in the dielectric that extend down to source and drain regions of the transistor; forming an epitaxial material in the contact trenches on the source and drain regions; implanting P into the epitaxial material to form an amorphous P-doped layer; and annealing the amorphous P-doped layer under conditions sufficient to form a crystalline P-doped layer having a homogenous phosphorous concentration that is greater than about 1.5×10atoms per cubic centimeter (at./cm). Transistor devices are also provided utilizing the present P-doped Si source and drain contacts.


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