The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 24, 2023

Filed:

Oct. 19, 2020
Applicant:

Rigetti & Co, Llc, Berkeley, CA (US);

Inventors:

Colm Andrew Ryan, Albany, CA (US);

Eric Christopher Peterson, Miami, FL (US);

Marcus Palmer da Silva, Lafayette, CA (US);

Michael Justin Gerchick Scheer, Oakland, CA (US);

Deanna Margo Abrams, Oakland, CA (US);

Assignee:

Rigetti & Co, LLC, Berkeley, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06N 10/00 (2022.01); H03K 19/195 (2006.01); G06F 9/48 (2006.01); G06F 16/23 (2019.01);
U.S. Cl.
CPC ...
G06N 10/00 (2019.01); G06F 9/4843 (2013.01); G06F 16/2379 (2019.01); H03K 19/195 (2013.01);
Abstract

In a general aspect, a gate is formed for a quantum processor. In some implementations, an arbitrary program is received. The arbitrary program includes a first sequence of quantum logic gates, which includes a parametric XY gate. A native gate set is identified, which includes a set of quantum logic gates associated with a quantum processing unit. A second sequence of quantum logic gates corresponding to the parametric XY gate is identified, which includes a parametric quantum logic gate. Each of the quantum logic gates in the second sequence is selected from the native gate set. A native program is generated. The native program includes a third sequence of quantum logic gates. The third sequence of quantum logic gates corresponds to the first sequence of quantum logic gates and includes the second sequence of quantum logic gates. The native program is provided for execution by the quantum processing unit.


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