The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 24, 2023
Filed:
Mar. 11, 2021
Western Digital Technologies, Inc., San Jose, CA (US);
Hiep Tran, Milpitas, CA (US);
Dhayanithi Rajendiran, Milpitas, CA (US);
Christopher Dinh, San Jose, CA (US);
WESTERN DIGITAL TECHNOLOGIES, INC., San Jose, CA (US);
Abstract
Aspects of a storage device including a memory and a controller are provided which simplify controller management of logical and physical meta-dies and meta-blocks by allowing a logical meta-die to be mapped to multiple physical meta-dies. The memory includes first dies grouped in a first physical meta-die and second dies grouped in a second physical meta-die. The physical meta-dies each include physical meta-blocks. The controller maps a logical meta-die to the first physical meta-die and the second physical meta-die. The controller may also map logical meta-blocks of the logical meta-die to the physical meta-blocks. For instance, the controller may associate a first logical metablock of the logical meta-die to the first physical meta-die and a second logical metablock of the logical meta-die to the second physical meta-die. As a result, firmware complexity in managing meta-dies and meta-blocks may be reduced compared to one-to-one logical-to-physical meta-die mapping approaches.