The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2023

Filed:

Aug. 17, 2021
Applicant:

Ciena Corporation, Hanover, MD (US);

Inventors:

Aravinthan Vigneswaran, Kanata, CA;

Daniel Pollex, Kanata, CA;

Assignee:

Ciena Corporation, Hanover, MD (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 1/08 (2006.01);
U.S. Cl.
CPC ...
H03M 1/1023 (2013.01); H03M 1/08 (2013.01);
Abstract

An Analog-to-Digital Converter (ADC) includes a plurality of ADC channels connected to an in-service signal input via an isolated power combiner; an on-chip circuit including a calibration source connected to the isolated power combiner; and one or more switches configured to switch the ADC between an in-service mode and a calibration mode. The one or more switches are set such that, in the calibration mode, the in-service signal input is disconnected and the on-chip circuit is connected to the isolated power combiner, and, in the in-service mode, the in-service signal input is connected and the on-chip circuit is disconnected to the isolated power combiner. In the calibration mode, the on-chip circuit is configured to provide a test signal to the plurality of ADC channels for a determination of interleave errors in the plurality of ADC channels.


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