The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 2023
Filed:
Nov. 02, 2021
AU Optronics Corporation, Hsin-Chu, TW;
Yi-Chen Lu, Hsin-Chu, TW;
Hsu-Chi Li, Hsin-Chu, TW;
Yi-Jan Chen, Hsin-Chu, TW;
Boy-Yiing Jaw, Hsin-Chu, TW;
Chin-Tang Chuang, Hsin-Chu, TW;
Chung-Hung Chen, Hsin-Chu, TW;
AU OPTRONICS CORPORATION, Hsin-Chu, TW;
Abstract
The disclosure provides a voltage adjust circuit. The voltage adjust circuit includes a buffer circuit, a bias circuit, a level shifter and a cross voltage limit circuit. The buffer circuit includes a plurality of pull-up transistors and a plurality of pull-down transistors. The pull-up transistors coupled in series between an output terminal of the circuit and a high voltage system terminal. The pull-down transistors coupled in series between the output terminal and a low voltage system terminal. The cross voltage limit circuit is configured to limit transient and static bias voltages across two terminals of the pull-up transistors or the pull-down transistors.