The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2023

Filed:

Mar. 31, 2020
Applicant:

Stmicroelectronics (Grenoble 2) Sas, Grenoble, FR;

Inventors:

David Auchere, Meylan, FR;

Asma Hajji, Voiron, FR;

Fabien Quercia, Isere, FR;

Jerome Lopez, Saint Joseph de Riviere, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 23/552 (2006.01);
U.S. Cl.
CPC ...
H01L 24/85 (2013.01); H01L 23/3157 (2013.01); H01L 23/552 (2013.01); H01L 24/48 (2013.01); H01L 24/49 (2013.01); H01L 2224/45565 (2013.01); H01L 2224/48992 (2013.01); H01L 2224/48997 (2013.01); H01L 2224/49175 (2013.01); H01L 2224/8592 (2013.01); H01L 2924/00014 (2013.01);
Abstract

An electrical connection wire connects an electrical connection pad of an electrical chip and an electrical connection pad of a carrier substrate to which the electronic chip is mounted. A dielectric layer surrounds at least the bonding wire. The dielectric layer may be a dielectric sheath or a hardened liquid dielectric material. A dielectric material may also cover at least a portion of the electrical chip and carrier substrate. A liquid electrically conductive material is deposited and hardened to form a local conductive shield surrounding the dielectric layer at the bonding wire.


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