The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 17, 2023

Filed:

Jan. 31, 2017
Applicant:

Futurewei Technologies, Inc., Plano, TX (US);

Inventors:

Xiangyu Tang, Santa Clara, CA (US);

Ken Hu, Santa Clara, CA (US);

Xiaobing Lee, Santa Clara, CA (US);

Yunxiang Wu, Santa Clara, CA (US);

Assignee:

Futurewei Technologies, Inc., Addison, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G06F 12/122 (2016.01); G06F 12/12 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0246 (2013.01); G06F 12/02 (2013.01); G06F 12/122 (2013.01); G06F 12/12 (2013.01); G06F 2212/1036 (2013.01); G06F 2212/7201 (2013.01); G06F 2212/7211 (2013.01);
Abstract

A method performed by a processor to improve wear-leveling in a cross-point (XD) memory, comprises detecting, by a processor coupled to the XD memory, a trigger event, wherein the XD memory comprises a first section of memory units and a second section of memory units, and in response to detecting the trigger event, relocating, by the processor, data stored in a first memory unit of the first section of memory units to a memory unit adjacent to a last memory unit of the first section of memory units, and relocating, by the processor, data stored in a first memory unit of the second section of memory units to a memory unit adjacent to a last memory unit of the second section of memory units.


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