The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 10, 2023
Filed:
Mar. 16, 2021
Applicant:
Ethernovia Inc., San Jose, CA (US);
Inventor:
Max Klaus Turner, Utrecht, NL;
Assignee:
Ethernovia Inc., San Jose, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 5/16 (2006.01); H04L 5/14 (2006.01); H04L 7/00 (2006.01);
U.S. Cl.
CPC ...
H04L 5/16 (2013.01); H04L 5/143 (2013.01); H04L 5/1438 (2013.01); H04L 5/1469 (2013.01); H04L 7/0037 (2013.01);
Abstract
Disclosed are systems, methods, and non-transitory computer-readable media for clock synchronization in half-duplex communication systems. Devices in a half-duplex system are synchronized based on time stamp values captured by each device that define a specified period of time that is of equal in length. The specified period of time spans two change-over periods to average the jitter and/or drift that occurs during each period. Each device uses these measured lengths to determine the variance in the rates at which the two internal clocks operates, which is then used to synchronizes the internal clocks of the two devices.