The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 10, 2023

Filed:

Dec. 11, 2020
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Graeme G. Mackay, Austin, TX (US);

Jason W. Lawrence, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 3/158 (2006.01); H02M 1/44 (2007.01); H02M 1/00 (2006.01); H02M 3/156 (2006.01); H02M 3/157 (2006.01); H02M 1/15 (2006.01); H02M 3/04 (2006.01);
U.S. Cl.
CPC ...
H02M 3/1586 (2021.05); H02M 1/0025 (2021.05); H02M 3/1566 (2021.05); H02M 3/1584 (2013.01); H02M 1/00 (2013.01); H02M 1/0009 (2021.05); H02M 1/15 (2013.01); H02M 1/44 (2013.01); H02M 3/04 (2013.01); H02M 3/157 (2013.01); H02M 3/1582 (2013.01);
Abstract

A method of randomizing inductor current in at least one of a plurality of parallel coupled peak valley current-controlled power converters may include comparing the inductor current to a threshold to generate a comparison signal, delaying the comparison signal by a plurality of delay amounts to generate a plurality of delayed versions of the comparison signal, and randomly selecting one of the plurality of delayed versions of the comparison signal for controlling the inductor current during one or both of a charging state and a transfer state of the at least one of the plurality of parallel coupled peak/valley current-controlled power converters.


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